Designs
worth fabbing.
Reference designs across every paradigm — silicon, photonic, quantum, neuromorphic, MEMS, RF, power. Most are free to use; the proprietary ones are licensable per tapeout.
Start at the deployed system, not the chip.
Real open-hardware products — a smart ring, a phone, a laptop, a self-driving computer, a datacenter AI node, a photonic tile — decomposed to their bill of materials and classified: what's already solved, what just refreshes on a clock, and the one slice worth designing. Work top-down to build bottom-up.
Open the systems →Open foundations
5Reference designs built and given away — the base SoC, primitive library, and core flows that everyone else builds on top of.
Binarized neural network neuron
siliconSingle-bit weight + single-bit activation neuron primitive for ultra-low-power BNN inference. Designed for sky130; composable into BNN-MAC arrays.
Joule M5 base SoC
siliconMonolithic RISC-V SoC for the Joule SiP ecosystem — VexRiscv + seL4 + Rust, 384KB SRAM, ReRAM, GPIF→CrossLink-NX bridge. Designed for SKY130 with OpenFrame pinout.
Reversible 3-bit adder
siliconReversible adder composed from Toffoli tiles. Carry-preserving, energy-bounded; demonstrates Landauer-limit-respecting addition on sky130.
Toffoli reversible logic tile
siliconUniversal 3-bit reversible gate (CCNOT) implemented as a sky130 tile. Energy-bounded computation primitive; foundation for adiabatic / reversible / quantum-classical hybrid designs.
Periodic Stack — math primitive manifest
hybridCatalog of 258 fundamental math primitives organized into 33 families. The Rosetta Stone for mapping computational patterns to silicon (and photonic, quantum, thermodynamic) substrates.
Proprietary IP
1Fully characterized, supported, and licensable per tapeout. The blocks we've designed end-to-end.
Curated external IP
1High-quality IP that lives elsewhere. We track integration paths and link straight to the source.